ZL50111 PRODUCT PROFILE
1024 Channel (32 T1/E1, 2 T3/E3) CESoP Processor with triple Ethernet interface
Product Status: Production
- Overview
- Technical Documents
- Tools & Software
- Applications
- Packaging & availability
- Support
- Where to Buy
| The ZL50111 is a highly functional TDM to Packet bridging device that provides structured and unstructured circuit emulation services (CES) for T1/E1 streams across a packet network based on Ethernet technology. The ZL50111 is capable of assembling user-defined packets of TDM traffic from the TDM access interface and transmitting them from the Ethernet interfaces using a variety of protocols such as Ethernet VLAN's, IP (both versions 4 and 6) and MPLS. The device also supports four different classes of service on packet egress, allowing priority treatment of TDM-based traffic. The circuit emulation features in the ZL50111 comply with the relevant standards currently being developed within the IETF's PWE3 working group. The ZL50111 incorporates a range of powerful clock recovery mechanisms and sufficient on-chip memory that external memory is not required in most applications. This reduces system costs and simplifies the design. |
Features & Benefits
- 1024 bi-directional 64 kbps channels in structured, synchronous CES
- 32 T1/E1 or 2 T3/E3 unstructured, asynchronous CES, with integral per stream clock recovery
- Interface either directly to LIU, via a framer, or via a TDM backplane
- Dual reference Stratum 3, 4 and 4E PLL for synchronous operation
- 3 x 100 Mbps MII or Dual Redundant 1000 Mbps GMII/PCS(TBI) Ethernet Interfaces
- Flexible 32 bit host CPU interface (Motorola PowerQUICCTM II compatible)
- On-chip packet memory for self-contained operation, with buffer depths of over 16 ms
- Flexible, multi-protocol packet encapsulation
- Packet sequencing to allow lost packet detection
- Four classes of service with programmable priority mechanisms (WFQ and SP)
- Classification of incoming packets at layers 2, 3, 4, and 5
Documentation
Design Manuals
- zl5011x_design_manual_apr10.pdfPlease login to access protected documents.
- zl50110-1-4-secure-memory-estimator-apr2005.xlsPlease login to access protected documents.
- zl5011x-ethernet-bandwidth-estimator-aug2005.xls
Software Manuals
- zl50110-1-4-full-programmers-model-jan2005.pdfPlease login to access protected documents.
- zls50111-full-api-userguide-nov2008.pdfPlease login to access protected documents.
Application Notes
- List of ZL5011x Application Notes - May 2009Please login to access protected documents.
- ZLAN-156 (secure) - Applications of the CESoP ProcessorsPlease login to access protected documents.
- ZLAN-138 (secure) - Applications of the CESoP ProcessorsPlease login to access protected documents.
- ZLAN-139 (secure) - MT9076 Framer with ZL5011xPlease login to access protected documents.
Product Previews
Downloads, Firmware and Drivers
- BSDL Files:
- zl50111gag.bsd
- IBIS Models:
- zl50111gag.ibs
- PCB Design Files:
- zle50110-1-4-pcb-design-files.zip
Evaluation Boards
- zl50110-1-4-v4-secure-orcad-libary-dec2004.olb
- zls50110-1-4-demostration-software-user-guide-sep2003.pdf
- zle50111-eval-board-description-nov2004.pdf
- zle50110-1-eval-board-user-guide-sep2003.pdf
Reference Designs
Typical Applications
- Leased Line support over packet network
- Multi-Tenant Unit access concentration
- Packet switched backplane applications
- TDM backplane extension / expansion
Related Functions
Product Packaging & Availability
| Part Number |
Package Type |
Pin Count |
Lead-Free Option |
Shipping Option(s) |
Lead Time(wks) |
Status |
|---|---|---|---|---|---|---|
| ZL50111GAG | PBGA | 552 | Trays. Bake & Drypack | 6-8 weeks | Production | |
| ZL50111GAG2 | PBGA | 552 | Pb-free-Tin/Silver/Copper | Trays. Bake & Drypack | 10-12 weeks | Production |
Packaging Information
Technical Support
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